British plan for fifth generation computer

Press, 11 February 1986, Page 28

British plan for fifth generation computer

A project aimed at the development of a fifth generation computer, capable of voice communication in several languages and simulation of thought, was announced recently by the British Government’s Department of Trade and Industry. Called Flagship, the project is the largest element of the Alvey programme of computing research. It will be undertaken by ICL, Plessey, Imperial College London and Manchester University. The project will receive an investment of £15.5 million (SNZ4O million) for its first three years.

Fifth generation computers will process data in parallel, whereas existing machines carry out instructions in sequence. As

a result, they may be able to work hundreds, or even thousands of times faster.

Flagship will make use of the Alice graph-reduc-tion machine, developed at Imperial College, which will incorporate the transputer microchip developed by the British microprocessor company Inmos.

The five-year Alvey programme has a budget of £2OO million (SNZS26 million) from the Government and £l5O million (SNZ39S million) from industry. Integrated circuit technology is being developed for the programme under three contracts awarded to STC’s Standard Telecommunications Laboratories and ICL. The contracts, from the

British Ministry of Defence, involve planned expenditure of almost £l7 million (SNZ4S million) over the next five years. They are among five to be presented under the second stage of the Ministry’s VAD initiative. The VAD programme (Very High Performance Integrated Circuit Application Demonstrator) is a programme funded half by the ministry and half by the companies involved. Two of the contracts have been placed with STC and cover developments in advanced radio and electronic counter counter measures (ECCM). The third has gone to ICL and covers high speed parallel processing based on ICL’s Distributed Array Processor concept